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A Fast Predictive Algorithm and Architecture for Block Matching Motion Estimation V.S.Kumar Reddy and Somnath Sengupta IIT, Kharagpur, India Abstract This paper describes a novel and fast approach to Full Search Block Matching (FSBM) employing prediction of search region, based on the spatial-temporal approach. The motion vector is predicted to belong to either of two regions, representing long-motion and short-motion, with limited amount of overlap between the two. The proposed prediction is statistically validated with more than 98% successes for different video sequences and the estimation accuracy is very close to that of FSBM. Although many ASICs for motion estimation have been developed, either the chip complexity is too high or the optimal accuracy was not achieved. Based on the predicted FSBM (PFSBM) algorithm, a VLSI chip is designed for motion estimation and it has been implemented using 16-processing elements to meet the real time requirement. The design can achieve maximum frequency up to 120 MHz. Its performance has been compared with other architectures reported in the literature and the results are encouraging.
Keywords: Video Coding, Motion
Estimation, Image Compression, VLSI architecture.
@ARTICLE{P115033004, AUTHOR = {V.S.Kumar Reddy and Somnath Sengupta}, TITLE = {A Fast Predictive Algorithm and Architecture for Block Matching Motion Estimation}, JOURNAL ={ICGST International Journal on Graphics, Vision and Image Processing, GVIP},
YEAR = {2008},
VOLUME = {08}, ISSUE ={I}, PAGES={9--16} }
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