Paper Details: Downloads: 397
Serial Number: P1150535171
Title: Reconfigurable Image Processing Architecture
Authors: P. Zemcík and A. Herout and V. Beran and O. Fucík and J. Schier
Abstract: This paper presents a novel concept of image processing architecture based on interconnection of the programmable logical chips (FPGAs) and digital signal processors (DSPs). Each of these technologies has very good features for some classes of image processing tasks while they fail to efficiently execute tasks of other classes. As these classes are different and nearly complementary for the above mentioned technologies, the combination of such technologies may achieve good results in larger classes of tasks. This paper also presents methods for development of applications for the proposed architecture and summarizes the potential of the architecture.
Keywords: Image processing, Digital signal processing, Programmable Logic, FPGA.
Journal/Conference: ICGST Conference on Graphics, Vision and Image Processing, GVIP-05
Volume:
Issue:
Submission Date: 9/1/2005 12:00:00 AM
Review Date: 11/1/2002 12:00:00 AM
Publishing Date: 12/19/2005 12:00:00 AM
Article Downloads: 397
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